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1 ? fn6560.0 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2009. all rights reserved all other trademarks mentioned are the property of their respective owners. ISL28133, isl28233, isl28433 single, dual, and quad micropower, zero-drift, rrio op erational amplifiers the ISL28133, isl28233 are single and dual micropower, zero-drift operational amplifiers that are optimized for single supply operation from 1.65v to 5.5v. their low supply current of 18a and wide input range enable the ISL28133 to be an excellent general purpose op amp for a range of applications. the ISL28133 is ideal for handheld devices that operates off 2 aa or single li-ion batteries. the ISL28133 is available in the 5 ld sot-23, the 5 ld sc70 and the 6 ld 1.6mmx1.6mm tdfn packages. all devices operates over the extended temperature range of -40c to +125c. features ? low input offset voltage . . . . . . . . . . . . . . . . . . 8v, max. ? low offset drift. . . . . . . . . . . . . . . . . . . . 0.075v/c, max ? quiescent current . . . . . . . . . . . . . . . . . . . . . . 18a, typ. ? wide supply range . . . . . . . . . . . . . . . . . . . 1.65v to 5.5v ? low output noise (0.01hz to 10hz). . . . . . . 1.1v p-p , typ. ? rail-to-rail inputs and output ? input bias current . . . . . . . . . . . . . . . . . . . . . 300pa, max. ? operating temperature range. . . . . . . . . -40c to +125c pinouts ordering information part number part marking package (pb-free) pkg. dwg. # ISL28133fhz-t7* (note 1) bcfa 5 ld sot-23 mdp0038 coming soon ISL28133fhz-t7a* (note 1) bcfa 5 ld sot-23 mdp0038 coming soon ISL28133fez-t7* (note 1) bha 5 ld sc70 p5.049 coming soon ISL28133fez-t7a* (note 1) bha 5 ld sc70 p5.049 coming soon ISL28133fruz-t7* (note 2) t8 6 ld tdfn l6.1.6x1.6c coming soon isl28233fuz (note 1) 8233z 8 ld msop mdp0043 coming soon isl28233fuz-t7* (note 1) 8233z 8 ld msop mdp0043 coming soon isl28233frtz-t7* (note 1) tbd 8 ld tdfn tbd coming soon isl28433fvz (note 1) tbd 14 ld tssop m14.173 *please refer to tb347 for details on reel specifications. notes: 1. these intersil pb-free plastic packaged products employ special pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations). intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. 2. these intersil pb-free plastic packaged products employ special pb-free material sets; molding compounds/die attach materials and nipdau plate - e4 termination fi nish, which is ro hs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. ISL28133 (5 ld sot-23) top view ISL28133 (5 ld sc-70) top view ISL28133 (6 ld tdfn) top view isl28233 (8 ld msop) top view isl28233 (8 ld tdfn) top view isl28433 (14 ld tssop) top view out v- in+ v+ in- 1 2 3 5 4 +- in+ v- in- v+ out 1 2 3 5 4 + - 1 2 3 6 4 5 out v- in - v+ nc in + + - 1 2 3 4 8 7 6 5 out_a in-_a in+_a v+ out_b in-_b v- in+_b + - +- 2 3 4 1 7 6 5 8 v out a -in a +in a v- v+ v out b -in b +in b + - +- out_a in-_a in+_a v + in+_b in-_b out_b out_d in-_d in+_d v - in+_c in-_c out_c 1 2 3 4 5 6 7 14 13 12 11 10 9 8 + - +- + - +- data sheet march 25, 2009
2 fn6560.0 march 25, 2009 absolute maximum rati ngs thermal information max supply voltage v+ to v- . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75v max voltage vin to gnd . . . . . . . . . . . . . . . . . . . . . . -0.5v to 5.75v max input differential voltage . . . . . . . . . . . . . . . . . . . . . . . . . 5.75v max input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ma max voltage vout to gnd (10s) . . . . . . . . . . . . . . . . . . . . . . 5.75v esd rating human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3000v machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200v charged device model. . . . . . . . . . . . . . . . . . . . . . . . . . . . .1500v thermal resistance (typical, note 3) ja (c/w) 5 ld sot-23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225 5 ld sc70 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206 6 ld tdfn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 maximum storage temperature range . . . . . . . . . .-65c to +150c pb-free reflow profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp operating conditions temperature range . . . . . . . . . . . . . . . . . . . . . . . . .-40c to +125c caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. note: 3. ja is measured with the component mounted on a high effective therma l conductivity test board in free air. see tech brief tb379 f or details. electrical specifications v + = 5v, v - = 0v, vcm = 2.5v, t a = +25c, r l = 10k , unless otherwise specified. boldface limits apply over the operating temperature range, -40c to +125c. parameter description conditions min (note 4) typ max (note 4) unit dc specifications v os input offset voltage -8 2 8 v -15.5 15.5 v tcv os input offset voltage temperature coefficient 0.02 0.075 v/c i os input offset current -60 pa i b input bias current -300 30 300 pa -600 600 pa common mode input voltage range v+ = 5.0v, v- = gnd -0.1 5.1 v cmrr common mode rejection ratio vcm = -0.1v to 5.0v 118 125 db 115 db psrr power supply rejection ratio vs = 2v to 5.5v 110 138 db 110 db v oh output voltage swing, high r l = 10k 4.965 4.981 v v ol output voltage swing, low 18 35 mv a ol open loop gain r l = 1m 200 db v + supply voltage (note 5) 1.65 5.5 v i s supply current r l = open 18 25 a 35 a i sc+ output source short circuit current r l = short to ground or v+ 13 17 26 ma i sc- output sink short circuit current -26 -19 -13 ma ac specificatons gbwp gain bandwidth product f = 50khz a v = 100, r f = 100k , r g = 1k , r l = 10k to v cm 400 khz e n v p-p peak-to-peak input noise voltage f = 0.01hz to 10hz 1.1 v p-p e n input noise voltage density f = 1khz 65 nv/ (hz) ISL28133, isl28233, isl28433
3 fn6560.0 march 25, 2009 i n input noise current density f = 1khz 72 fa/ (hz) f = 10hz 79 fa/ (hz) c in differential input capacitance f = 1mhz 1.6 pf common mode input capacitance 1.12 pf transient response sr positive slew rate v out = 1v to 4v, r l = 10k 0.2 v/s negative slew rate 0.1 v/s t r , t f , small signal rise time, t r 10% to 90% a v = +1, v out = 0.1v p-p , r f = 0 , r l = 10k , c l = 1.2pf 1.1 s fall time, t f 10% to 90% 1.1 s t r , t f large signal rise time, t r 10% to 90% a v = +1, v out = 2v p-p , r f = 0 , r l = 10k , c l = 1.2pf 8s fall time, t f 10% to 90% 10 s t s settling time to 0.1%, 2v p-p step a v = +1, r f = 0 , r l = 10k , c l = 1.2pf 35 s notes: 4. parameters with min and/or max limits are 100% tested at +25 c, unless otherwise specified. te mperature limits established by characterization and are not production tested. 5. parts are 100% tested with a minimum operating voltage of 1.65v to a vos limit of +-15uv. electrical specifications v + = 5v, v - = 0v, vcm = 2.5v, t a = +25c, r l = 10k , unless otherwise specified. boldface limits apply over the operating temperature range, -40c to +125c. (continued) parameter description conditions min (note 4) typ max (note 4) unit typical performance curves v+ = 5v, v- = 0v, v cm = 2.5v, r l = open. figure 1. frequency response vs open loop gain, r l = 10k figure 2. frequency response vs open loop gain, r l = 10m -100 -50 0 50 100 150 200 1 100 10k 100k 1m 10m open loop gain (db)/phase ( ) frequency (hz) r l = 10k simulation c l = 100pf gain phase 1k 10 100m 10m 1m 0.1m -100 -50 0 50 100 150 200 open loop gain (db)/phase ( ) frequency (hz) r l = 10m simulation c l = 100pf gain phase 1 100 10k 100k 1m 10m 1k 10 100m 10m 1m 0.1m ISL28133, isl28233, isl28433
4 fn6560.0 march 25, 2009 figure 3. gain vs frequency vs r l, v s = 1.6v figure 4. gain vs frequency vs r l, v s = 5v figure 5. gain vs frequency vs feedback resistor values r f /r g figure 6. gain vs frequency vs v out, r l = open figure 7. frequency response vs closed loop gain figure 8. gain vs frequency vs supply voltage typical performance curves v+ = 5v, v- = 0v, v cm = 2.5v, r l = open. (continued) -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 frequency (hz) normalized gain (db) 10k 100k 1m 10m 1k 100 v + = 1.6v a v = +1 v out = 10mv p-p c l = 3.7pf r l = 1k r l = 10k r l = 49.9k r l = 100 r l = 100k r l = open -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 frequency (hz) normalized gain (db) 10k 100k 1m 10m 1k 100 v + = 5v a v = +1 v out = 10mv p-p c l = 3.7pf r l = 100k r l = 1k r l = 10k r l = open r l = 49.9k r l = 100 0 1 2 3 4 5 6 7 8 9 10 100 1k 10k 100k 1m frequency (hz) normalized gain (db) v + = 5v r l = 100k a v = +2 v out = 10mv p-p c l = 3.7pf r f = r g = 100k r f = r g = 100 r f = r g = 10k r f = r g = 1k -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 10k 100k 1m 10m frequency (hz) normalized gain (db) v + = 5v r l = open a v = +1 c l = 3.7pf 1k 100 v out = 10mv v out = 100mv v out = 1v v out = 250mv v out = 500mv -10 0 10 20 30 40 50 60 70 10 100 1k 10k 100k 1m 10m frequency (hz) gain (db) a v = 1 a v = 10 a v = 100 a v = 1000 v + = 5v v out = 10mv p-p c l = 3.7pf r l = 100k r g = 10k, r f = 100k r g = 100, r f = 100k r g = 1k, r f = 100k r g = open, r f = 0 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 frequency (hz) normalized gain (db) 10k 100k 1m 10m 1k 100 r l = 100k a v = +1 v out = 10mv p-p c l = 3.7pf v + = 1.6v v + = 3.0v v + = 5.5v v + = 1.2v ISL28133, isl28233, isl28433
5 fn6560.0 march 25, 2009 figure 9. gain vs frequency vs c l figure 10. cmrr vs frequency, v s = 5v figure 11. psrr vs frequency, v s = 5v figure 12. cmrr vs frequency, v s = 1.6v figure 13. psrr vs frequency, v s = 1.6v figure 14. input noise voltage density vs frequency typical performance curves v+ = 5v, v- = 0v, v cm = 2.5v, r l = open. (continued) frequency (hz) normalized gain (db) -10 -8 -6 -4 -2 0 2 4 6 8 10k 100k 1m 10m 1k 100 v + = 5v r l = 100k a v = +1 v out = 10mv p-p c l = 824pf c l = 224pf c l = 474pf c l = 51pf c l = 3.7pf c l = 104pf cmrr (db) 100 1k 10k 100k 1m 10m frequency (hz) 10 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 v + = 5v r l = 100k a v = +1 v cm = 1v p-p c l = 16.3pf psrr (db) 100 1k 10k 100k 1m 10m frequency (hz) 10 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 psrr- psrr+ v + = 5v r l = 100k a v = +1 v cm = 1v p-p c l = 16.3pf cmrr (db) 100 1k 10k 100k 1m 10m frequency (hz) 10 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 v + =1.6v r l = 100k a v = +1 v cm = 1v p-p c l = 16.3pf psrr (db) 100 1k 10k 100k 1m 10m frequency (hz) 10 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 psrr- psrr+ v + = 1.6v r l = 100k a v = +1 v cm = 1v p-p c l = 16.3pf frequency (hz) 10 100 1000 input noise voltage (nv/ hz) 0.001 0.01 0.1 1 10 100 1k 10k 100k v + = 5v a v = 1 ISL28133, isl28233, isl28433
6 fn6560.0 march 25, 2009 figure 15. input noise current density vs freque ncy figure 16. input noise voltage 0.1hz to 10hz figure 17. large signal step response (4v) figure 18. large signal step response (1v) figure 19. small signal step response (100mv) figu re 20. average input offset voltage vs supply voltage typical performance curves v+ = 5v, v- = 0v, v cm = 2.5v, r l = open. (continued) frequency (hz) 0.01 0.1 1.0 0.001 0.01 0.1 1 10 100 1k 10k 100k input noise current (pa/ hz) v + = 5v a v = 1 time (s) input noise voltage (nv) -600 -400 -200 0 200 400 600 800 0 102030405060708090100 v + = 5v r l = 100k r g = 10, r f = 100k a v = 10,000 c l = 3.7pf time (s) large signal (v) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 50 100 150 200 250 300 350 400 v + = 5v r l = 100k a v = 1 c l = 3.7pf v out = 4v p-p time (s) large signal (v) 0 0.2 0.4 0.6 0.8 1.0 1.2 0 102030405060708090100 v + = 5v r l = 100k a v = 1 c l = 3.7pf v out = 1v p-p time (s) small signal (v) 0 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0 5 10 15 20 25 30 35 40 v + = 5v r l = 100k a v = 1 c l = 3.7pf v out = 100mv p-p 0.5 1.0 1.5 2.0 2.5 3.0 3.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 supply voltage (v) average v os (v) +25c n = 67 -40c 125c +125c ISL28133, isl28233, isl28433
7 fn6560.0 march 25, 2009 figure 21. v os vs temperature, v s = 1.0v, v in = 0v, r l = inf figure 22. v os vs temperature, v s = 2.5v,v in = 0v, r l = inf figure 23. average non- inverting input bias current vs supply voltage vs temperature figure 24. average inverting input bias current vs supply voltage vs temperature figure 25. ios vs supply voltage vs temperature figure 26. cmrr vs temperature, vcm = -2.5v to +2.5v, v+ = 2.5v typical performance curves v+ = 5v, v- = 0v, v cm = 2.5v, r l = open. (continued) -12 -10 -8 -6 -4 -2 0 2 4 6 8 -40 -20 20 40 60 80 100 120 temperature (c) v os (v) 100 80 0 median min max n = 67 -6 -4 -2 0 2 4 6 8 10 -40 -20 0 20 40 60 80 100 120 temperature (c) v os (uv) median min max n = 67 -50 0 50 100 150 200 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 supply voltage (v) ibias in+(pa) -40c +25c +125c n = 12 +100c +75c -40c -50 0 50 100 150 200 250 1.52.02.53.03.54.04.55.05.5 supply voltage (v) ibias in-(pa) +25c +125c n = 12 +100c +75c -40c -40c -80 -70 -60 -50 -40 -30 -20 -10 0 10 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 supply voltage (v) average ios (pa) +125c n = 67 +25c 80 100 120 140 160 180 200 -40-200 20406080100120 temperature (c) cmrr (db) median min max n = 67 ISL28133, isl28233, isl28433
8 fn6560.0 march 25, 2009 figure 27. psrr vs temperature, v+ = 2v to 5.5v figure 28. v out high vs temperature, r l = 10k, v s +-2.5v figure 29. v out low vs temperature, r l = 10k, v s +-2.5v figure 30. supply current vs supply voltage figure 31. v+ supply current vs temperature, v s = 0.8v, v in = 0v, r l = inf figure 32. v+ supply current vs temperature, v s = 2.5v, v in = 0v, r l = inf typical performance curves v+ = 5v, v- = 0v, v cm = 2.5v, r l = open. (continued) 75 85 95 105 115 125 135 145 155 -40 -20 0 20 40 60 80 100 120 temperature (c) psrr (db) median min max n = 67 4.972 4.974 4.976 4.978 4.980 4.982 4.984 4.986 -40 -20 0 20 40 60 80 100 120 temperature (c) v out (v) median min max n = 67 0.016 0.017 0.018 0.019 0.020 0.021 0.022 0.023 0.024 -40 -20 0 20 40 60 80 100 120 temperature (c) v out (v) median min max n = 67 16 17 18 19 20 21 22 23 24 25 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 supply voltage (v) average supply current (a) +25c n = 67 -40c +125c 14 16 18 20 22 24 26 28 -40 -20 0 20 40 60 80 100 120 temperature (c) supply current (a) median min max n = 67 14 16 18 20 22 24 26 28 30 -40 -20 0 20 40 60 80 100 120 temperature (c) supply current (a) median min max n = 67 ISL28133, isl28233, isl28433
9 fn6560.0 march 25, 2009 n figure 33. v+ supply current vs temperature, v s = 3.0v, v in = 0v, r l = inf typical performance curves v+ = 5v, v- = 0v, v cm = 2.5v, r l = open. (continued) 14 16 18 20 22 24 26 28 30 32 -40 -20 0 20 40 60 80 100 120 temperature (c) supply current (a) median min max n = 67 pin descriptions ISL28133 (5 ld sot23) ISL28133 (5 ld sc70) ISL28133 (6 ld tdfn) isl28233 (8 ld msop, 8 ld tdfn) isl28433 (14 ld tssop) pin name function equivalent circuit 3143(a) 5(b) 3(a) 5(b) 10(c) 12(d) in+ non- inverting input circuit 1 222 4 11v-negative supply 4332(a) 6(b) 2(a) 6(b) 9(c) 13(d) in- inverting input (see circuit 1) 1411(a) 7(b) 1(a) 7(b) 8(c) 14(d) out output circuit 2 5 5 6 8 4 v+ positive supply 5ncnot connected not internally connected in- v+ in+ v- + - + - clock gen + drivers v + v- out ISL28133, isl28233, isl28433
10 fn6560.0 march 25, 2009 applications information functional description the ISL28133 uses a proprietary auto-zero architecture (figure 34) that combines a 400khz main amplifier with a very high open loop gain (200db) chopper stabilized amplifier to achieve very low offset voltage and drift (2v, 0.02v/c typical) while cons uming only 18a of supply current per channel. this multi-path amplifier architecture contains a time continuous main amplifier whose input dc offset is corrected by a parallel-connected, high gain chopper stabilized dc correction amplifier operating at 100khz. from dc to ~5khz, both amplifiers are active with dc offset correction and most of the low frequency gain is provided by the chopper amplifier. a 5khz crossover filter cuts off the low frequency amplifier path leaving the main amplifier active out to the 400khz gain-bandwidth product of the device. the key benefits of this architecture for precision applications are very high open loop gain, very low dc offset, and low 1/f noise. the noise is virtually flat across the frequency range from a few millihertz out to 100khz, except for the narrow noise peak at the amplifier crossover frequency (5khz). rail-to-rail input and output (rrio) the rrio cmos amplifier uses parallel input pmos and nmos that enable the inputs to swing 100mv beyond either supply rail. the inverting and non-inverting inputs do not have back-to-back input clamp diodes and are capable of maintaining high input impedance at high differential input voltages. this is effective in eliminating output distortion caused by high slew-rate input signals. the output stage uses common source connected pmos and nmos devices to achieve rail-to-rail output drive capability with 17ma current limit and the capability to swing to within 20mv of either rail while driving a 10k load. in+ and in- protection all input terminals have internal esd protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. for applications where either input is expected to exceed the rails by 0.5v, an external series resistor must be used to ensure the input currents never exceed 20ma (figure 35). layout guidelines for high impedance inputs to achieve the maximum performance of the high input impedance and low offset voltage of the isl28x33 amplifiers, care should be taken in the circuit board layout. the pc board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. surface coating of the circuit board will reduce surface moisture and provide a humidity barrier, reducing parasi tic resistance on the board. the use of guard rings around t he amplifier inputs will further reduce leakage currents. figure 36 shows how the guard ring should be configured. the guard ring does not need to be a specific width, but it should form a continuous loop around both inputs. by setting the guard ring voltage equal to the voltage at the non-inverting input, parasitic capacitance is minimized as well. high gain, precision dc coupled amplifier the circuit in figure 37 implements a single-stage dc coupled amplifier with an inpu t dc sensitivity of under 100nv that is only possible using a low vos amplifier with high open loop gain. high gain dc amplifiers operating from low figure 34. isl28x33 functional block diagram v out in- in+ 5khz crossover filter chopper stabilized dc offset correction main amplifier figure 35. input current limiting - + r in r l v in v out ISL28133 in v+ figure 36. use of guard rings to reduce leakage high impedance input guard ring pc trace + - ISL28133, isl28233, isl28433
11 fn6560.0 march 25, 2009 voltage supplies are not practical using typical low offset precision op amps. for example, the typical 100v v os and offset drift 0.5v/ c of a low offset op amp would produce a dc error of >1v with an additional 5mv c of temperature dependent error making it difficult to resolve dc input voltage changes in the micro-volt range. the 8v max v os and 0.075v/ c of the ISL28133 produces a temperature stable maximum dc output error of only 80mv with a maximum temp erature drift of 0.75v/ c. the additional benefit of a very low 1/f noise corner frequency and some feedback filtering enables dc voltages and voltage fluctuations well below 100nv to be easily detected with a simple single stage amplifier. figure 37. high gain, precision dc coupled amplifier - + 100 r l v in v out 1m 1m , 100 ISL28133 -2.5v +2.5v a cl = 10kv/v c f 0.018f ISL28133, isl28233, isl28433
12 fn6560.0 march 25, 2009 ISL28133, isl28233, isl28433 sot-23 package family e1 n a d e 4 3 2 1 e1 0.15 d c 2x 0.20 c 2x e b 0.20 m d c a-b b nx 6 2 3 5 seating plane 0.10 c nx 1 3 c d 0.15 a-b c 2x a2 a1 h c (l1) l 0.25 0 +3 -0 gauge plane a mdp0038 sot-23 package family symbol millimeters tolerance sot23-5 sot23-6 a 1.45 1.45 max a1 0.10 0.10 0.05 a2 1.14 1.14 0.15 b 0.40 0.40 0.05 c 0.14 0.14 0.06 d 2.90 2.90 basic e 2.80 2.80 basic e1 1.60 1.60 basic e 0.95 0.95 basic e1 1.90 1.90 basic l 0.45 0.45 0.10 l1 0.60 0.60 reference n 5 6 reference rev. f 2/07 notes: 1. plastic or metal protrusions of 0.25mm maximum per side are not included. 2. plastic interlead protrusions of 0.25mm maximum per side are not included. 3. this dimension is measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m-1994. 5. index area - pin #1 i.d. will be located within the indicated zone (sot23-6 only). 6. sot23-5 version has no center lead (shown as a dashed line).
13 fn6560.0 march 25, 2009 ISL28133, isl28233, isl28433 small outline transistor plastic packages (sc70-5) d e 1 e e1 c l c c l e b c l a2 a a1 c l 0.20 (0.008) m 0.10 (0.004) c c -c- seating plane 4 5 123 view c view c l r1 r 4x 1 4x 1 gauge plane l1 seating l2 c plane c base metal with c1 b1 plating b 0.4mm 0.75mm 0.65mm 2.1mm typical recommended land pattern p5.049 5 lead small outline transistor plastic package symbol inches millimeters notes min max min max a 0.031 0.043 0.80 1.10 - a1 0.000 0.004 0.00 0.10 - a2 0.031 0.039 0.80 1.00 - b 0.006 0.012 0.15 0.30 - b1 0.006 0.010 0.15 0.25 c 0.003 0.009 0.08 0.22 6 c1 0.003 0.009 0.08 0.20 6 d 0.073 0.085 1.85 2.15 3 e 0.071 0.094 1.80 2.40 - e1 0.045 0.053 1.15 1.35 3 e 0.0256 ref 0.65 ref - e1 0.0512 ref 1.30 ref - l 0.010 0.018 0.26 0.46 4 l1 0.017 ref. 0.420 ref. - l2 0.006 bsc 0.15 bsc 0 o 8 o 0 o 8 o - n5 55 r 0.004 - 0.10 - r1 0.004 0.010 0.15 0.25 rev. 3 7/07 notes: 1. dimensioning and tolerances per asme y14.5m-1994. 2. package conforms to eiaj sc70 and jedec mo-203aa. 3. dimensions d and e1 are exclusiv e of mold flash, protrusions, or gate burrs. 4. footlength l measured at reference to gauge plane. 5. ?n? is the number of terminal positions. 6. these dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. controlling dimension: millime ter. converted inch dimen- sions are for reference only.
14 fn6560.0 march 25, 2009 ISL28133, isl28233, isl28433 package outline drawing l6.1.6x1.6c 6 lead thin dual flat no-lead col plastic package (utdfn col) rev 0, 08/08 located within the zone indicated. the pin #1 indentifier may be unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 identifier is optional, but must be between 0.20mm and 0.30mm from the terminal tip. dimension b applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing conform to amsey14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" side view typical recommended land pattern top view (4x) 0.15 a 1.60 b 1.60 0. 25 0. 05 / -0.07 b 0.10m a c c seating plane base plane 0.08 0.10 see detail "x" c c 0 . 00 min. 0 . 05 max. 0 . 2 ref c 5 (6x 0.25) (1x 0.80) (5x 0.70) 0.55 max index area pin 1 6 2x 1.00 4x 0.50 (4x .050) 5x 0. 50 0. 1 1x0. 60 0. 1 4 2.00
15 fn6560.0 march 25, 2009 ISL28133, isl28233, isl28433 mini so package family (msop) 1 (n/2) (n/2)+1 n plane seating n leads 0.10 c pin #1 i.d. e1 e b detail x 3 3 gauge plane see detail "x" c a 0.25 a2 a1 l 0.25 c a b d a m b e c 0.08 c a b m h l1 mdp0043 mini so package family symbol millimeters tolerance notes msop8 msop10 a1.101.10 max. - a1 0.10 0.10 0.05 - a2 0.86 0.86 0.09 - b 0.33 0.23 +0.07/-0.08 - c0.180.18 0.05 - d 3.00 3.00 0.10 1, 3 e4.904.90 0.15 - e1 3.00 3.00 0.10 2, 3 e0.650.50 basic - l0.550.55 0.15 - l1 0.95 0.95 basic - n 8 10 reference - rev. d 2/07 notes: 1. plastic or metal protrusions of 0.15mm maximum per side are not included. 2. plastic interlead protrusions of 0.25mm maximum per side are not included. 3. dimensions ?d? and ?e1? are measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m-1994.
16 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6560.0 march 25, 2009 ISL28133, isl28233, isl28433 thin shrink small outlin e plastic packages (tssop) index area e1 d n 123 -b- 0.10(0.004) c a m bs e -a- b m -c- a1 a seating plane 0.10(0.004) c e 0.25(0.010) b m m l 0.25 0.010 gauge plane a2 notes: 1. these package dimensions are wi thin allowable dimensions of jedec mo-153-ac, issue e. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e1? does not include in terlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dam bar protrusion. allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of ?b? dimen- sion at maximum material conditi on. minimum space between protru- sion and adjacent lead is 0.07mm (0.0027 inch). 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact. (angles in degrees) 0.05(0.002) m14.173 14 lead thin shrink small outline plastic package symbol inches millimeters notes min max min max a - 0.047 - 1.20 - a1 0.002 0.006 0.05 0.15 - a2 0.031 0.041 0.80 1.05 - b 0.0075 0.0118 0.19 0.30 9 c 0.0035 0.0079 0.09 0.20 - d 0.195 0.199 4.95 5.05 3 e1 0.169 0.177 4.30 4.50 4 e 0.026 bsc 0.65 bsc - e 0.246 0.256 6.25 6.50 - l 0.0177 0.0295 0.45 0.75 6 n14 147 0 o 8 o 0 o 8 o - rev. 2 4/06

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